報告人： Rujia Wang，美國伊利諾伊理工大學計算機科學系，助理教授。
報告時間：2020年12月18日 (星期五) 上午9:00 - 11:00
Meeting ID: 281 001 9605
報告摘要：As we enter the post Moore's law era, simply gaining performance by scaling the technology node to a smaller size is becoming more difficult. The memory system has been identified as the primary performance bottleneck in a system due to the slow access latency, limited bandwidth, and the increasing number of data-intensive workloads. As a result, extensive memory architecture innovations are happening, aiming at breaking the ``memory wall" issue.
While the performance and scalability have been the design-centric of future computing systems for many years, recently, security has become the desired add-on design feature due to the unprecedented increase in cyber and physical attacks. In this talk, I will first discuss the vulnerabilities and challenges of building a secure memory system. Then, I will introduce one of the representative cryptographic protocols, Oblivious RAM, that can defend side-channel attacks through the memory access pattern. I will talk about several recent works regarding performance optimization for ORAM through protocol and architecture co-design. Lastly, I will discuss future potentials to build performance-oriented secure memory architectures.
報告人簡介：Rujia Wang is an Assistant Professor in the Computer Science Department at Illinois Institute of Technology. She received her Ph.D. degree from the University of Pittsburgh in 2018 and B.E. from Zhejiang University in 2013. Her research experience spans multiple areas in computer architecture and high-performance computing, focusing on the design and optimization of new memory hierarchies and systems for better performance, scalability, security, and reliability. Her work has been published in top conferences in the computer architecture field, including ASPLOS, HPCA, DAC, ICCD, etc. She serves as the PC and ERC for HPCA, MICRO, ISCA, ASPLOS, DAC, IPDPS, and guest editor for TC hardware security special issue.
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